**Who this is for** This position is for a mid-level engineer with a passion for optimizing chip design workflows and improving developer efficiency through inf
Work type: hybrid
Location: US, CA, Santa Clara | US, MA, Westford | US, TX, Austin | US, NC, Durham
Salary: $152,000 – $287,500/yr
Type: Full-time
**Who this is for** This position is for a mid-level engineer with a passion for optimizing chip design workflows and improving developer efficiency through infrastructure and automation. **Key highlights** You will partner with global engineering teams to streamline the entire chip design lifecycle—from architectural inception to production—by building data-driven metrics and improving the scalability of compute and storage environments. **You might be a good fit if you...** - Have 5+ years of experience with ASIC/EDA workflow environments and UNIX systems programming. - Are proficient in Python or Shell scripting for automation. - Have practical experience with job schedulers like SLURM or IBM Spectrum LSF. - Possess strong debugging skills and a data-driven approach to solving infrastructure bottlenecks.
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
NVIDIA reinvented itself over two decades, inventing the GPU in 1999 to reshape PC gaming and modern computer graphics. As an engineer in our EDA Workflow Optimization team, you will partner closely with our engineering teams worldwide. You will understand workflows covering the full chip design process from inception through study, architecture, design, verification, emulation, layout, packaging, power-on and production. You will then guide teams to improve, and sometimes re-invent those flows. You will enable our engineers to have the best tools on the planet to make the most innovative chips in the world. You will perform investigations to understand flaws and opportunities, construct metrics to continuously measure performance of our flows and services, and other infrastructure. You will work with your team of EDA and software experts to build new infrastructure in an agile, production software environment. You will continuously innovate and enhance scalable, reliable, high performance systems and tools to enable the next generation of chips!
What you’ll be doing:
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for Level 4.
You will also be eligible for equity and [benefits](https://www.nvidia.com/en-us/benefits/).
Applications for this job will be accepted at least until April 26, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.