Senior ASIC Design Engineer – Clocks IP at NVIDIA

You are an electrical engineering professional with at least three years of experience in ASIC design and a degree in Electrical Engineering or equivalent. You have a solid grasp of clock domain architecture and logic synthesis within high performance computing environments. **What makes it worth a look...** NVIDIA offers a hybrid role in Santa Clara or Austin with an annual salary range between $136,000 and $264,500 depending on seniority level. Beyond the base pay, you get access to equity and comprehensive company benefits while working on cutting edge GPU and CPU clocking technology. **You might be a good fit if you...** * Have hands on experience with RTL design using Verilog. * Are proficient in Python or similar industry standard scripting languages. * Possess a deep understanding of logic optimization and PPA trade offs. * Have practical experience with clock controller and logic design.