Senior ASIC Timing Engineer at NVIDIA

You are a skilled ASIC engineer with a degree in Electrical or Computer Engineering and at least two to five years of experience in Static Timing Analysis. Your background involves handling complex timing closure for high-performance chips like GPUs or CPUs. **What makes it worth a look...** NVIDIA offers a salary range between $136,000 and $264,500 based on experience and level for this on-site role in Santa Clara. You gain the chance to work directly on industry-leading AI and GPU architecture alongside equity and comprehensive benefits. **You might be a good fit if you...** * Possess hands-on experience in full-chip or sub-chip Static Timing Analysis. * Can drive timing closure, ECO implementation, and noise analysis. * Understand deep sub-micron process nodes for complex designs. * Have expertise in timing constraints management and industry-standard STA tools.