Senior Logic Design Engineer, Cache Coherent Interconnects at NVIDIA

You're a senior-level engineer with a Master's degree in EE, CE, or CS, or equivalent experience, bringing at least five years of experience in high-performance

Work type: hybrid

Location: US, CA, Santa Clara | US, OR, Hillsboro

Salary: $136,000 – $264,500/yr

Type: Full-time

You're a senior-level engineer with a Master's degree in EE, CE, or CS, or equivalent experience, bringing at least five years of experience in high-performance semiconductor design, particularly in processor or related fields. **What makes it worth a look...** This full-time, hybrid role at NVIDIA offers a compelling annual salary range of $136,000 to $264,500, depending on experience and location, within the US. **You might be a good fit if you...** * Have 5+ years in processor or high-performance semiconductor design. * Possess strong Verilog expertise and a deep understanding of the ASIC design flow. * Have a solid background in computer architecture, cache coherency, or high-speed interconnects. * Are experienced in RTL design, synthesis, timing closure, and logic debug.

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