Senior Physical Design Methodology Engineer, PPA Fusion Compiler at NVIDIA

You're a seasoned Physical Design Methodology Engineer with at least 10 years of experience, holding an MS degree in Electrical, Computer Engineering, or Comput

Work type: onsite

Location: US, CA, Santa Clara | US, TX, Austin | US, OR, Hillsboro

Salary: $168,000 – $310,500/yr

Type: Full-time

Summary

You're a seasoned Physical Design Methodology Engineer with at least 10 years of experience, holding an MS degree in Electrical, Computer Engineering, or Computer Science, or equivalent experience, and possess a strong background in developing ML-based solutions for physical design challenges. **What makes it worth a look...** This full-time, on-site role is with NVIDIA, offering an annual salary range of $168,000 to $310,500, with opportunities in Santa Clara, CA; Austin, TX; and Hillsboro, OR. You'll also be eligible for equity and NVIDIA's comprehensive benefits package. **You might be a good fit if you...** * Have proven experience implementing ML-based solutions for physical design. * Are familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and Route, Integration, and Verification. * Possess strong scripting skills for checking and improving PPA (Power, Performance, Area). * Understand hierarchical design approaches, budgeting, timing, and physical convergence.

Job Description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer, PPA Fusion Compiler to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take part in crafting our groundbreaking and innovative chips, enjoy working in a meaningful, growing and professional environment where you make a significant impact in a technology-focused company.

What you will be doing:






What we need to see:









NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and [benefits](https://www.nvidia.com/en-us/benefits/).

Applications for this job will be accepted at least until April 18, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

View this job on nocollar jobs