Senior Power Integrity Engineer - LPU Packaging at NVIDIA

You're a Senior Power Integrity Engineer with at least 12 years of relevant experience, holding an MS or PhD in Electrical Engineering or a related field, or equivalent experience. **What makes it worth a look...** NVIDIA is hiring a full-time, on-site Senior Power Integrity Engineer in Santa Clara, CA. The role offers a strong annual salary range of $196,000 to $368,000, reflecting the seniority and expertise required. **You might be a good fit if you...** * Have proven ownership of the chip-package-board PDN design and sign-off process. * Possess hands-on experience with FCBGA, 2.5D/3D integration, HBM, or similar high-power, high-pin-count packages. * Are proficient with frequency-domain PDN impedance analysis and time-domain simulation tools like PowerSI, PowerDC, Sigrity, RedHawk, or SPICE. * Have experience executing lab measurements using VNAs, oscilloscopes, and PDN analyzers.