Senior Verification Engineer - Hardware at NVIDIA

You're a Senior Verification Engineer with at least 3 years of experience, holding an M.S. or equivalent in Electrical Engineering, Computer Science, or a relat

Work type: onsite

Location: US, CA, Santa Clara

Salary: $168,000 – $310,500/yr

Type: Full-time

Summary

You're a Senior Verification Engineer with at least 3 years of experience, holding an M.S. or equivalent in Electrical Engineering, Computer Science, or a related field, and are proficient in Verilog/VHDL, C/C++, and SystemVerilog. **What makes it worth a look...** This full-time, on-site role is with NVIDIA in Santa Clara, CA, offering a competitive annual salary range of $168,000 to $310,500, plus equity and benefits. **You might be a good fit if you...** * Are experienced with UVM verification environments. * Can script using Perl, Python, and C/C++. * Understand hierarchical design, top-down design, SoC, and system-level verification. * Have experience with emulation techniques like C/C++ DPI Transactors and SV assertions.

Job Description

NVIDIA is looking for a Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking technology. We are work-flex, family and diverse team! NVIDIA invention of the GPU in 1999 accelerated the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new adventurous opportunities, that only we can seek, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Join us today!

What you will be doing:

We support multiple emulation environments using the latest emulation techniques (C/C++ DPI Transactors, SV assertions, Coverage, Power Estimation, SpeedBridges, Accelerated UVM Testbenches).

Bring up SOCs on emulation, root causing SoC/Processor test fails and emulator environment issues.

We have continual collaboration with Design, DV, Power, Silicon Validation, Performance, and Software teams.

Work constructively leading emulation vendors to debug issues using various tools.

What we need to see:

M.S or equivalent experience in Electrical Engineering, Computer Science, Computer Engineering or related field.

3+ years of proven experience.

Individual should be proficient in Verilog and/or VHDL, C/C++ and SystemVerilog.

Experience with UVM verification environments and scripting with Perl, Python and C/C++ is essential.

Be familiar with hierarchical design approach, top-down design, SoC and system level verification.

Candidates will be working on-site at our Santa Clara, CA location.

NVIDIA is on the move and our technology and vision position us as one of the world’s most desirable employers. We have some of the most forward-thinking and talented people on our journey. If you're inventive and autonomous, we want to hear from you!

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and [benefits](https://www.nvidia.com/en-us/benefits/).

Applications for this job will be accepted at least until April 17, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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